ETKİN ELDE SEÇMELİ KARMA TOPLAYICI DEVRELERİN TASARIMI

Farklı toplayıcı devrelerin birleştirilmesiyle oluşturulan karma toplayıcılar, çok geniş ölçekte tümleştirme (VLSI-Very Large Scale Integration) devre tasarımına uygun, temel ve önemli aritmetik işlem birimidir. Paralel toplama işlemine dayanan elde seçmeli toplayıcı (CSLACarry Select Adder) devreleri, düzenli ve modüler olması nedeniyle, karma toplayıcı devre tasarımlarında sıklıkla kullanılmaktadır. Bu nedenle, yüksek performanslı VLSI devre tasarımı için CSLA toplayıcıları büyük önem kazanmıştır. Bu durum, araştırmacıları CSLA tabanlı karma toplayıcı devrelerin tasarım algoritmalarını geliştirmeye yöneltmiştir. Bu çalışmada, çeşitli elde iletimli toplayıcı devre yapılarını (CPACarry Propagate Adder), Temel Ünite (TU) ile birlikte kullanarak yüksek performanslı elde seçmeli (CSLA) karma toplayıcı devre tasarımları geliştirilmiştir. Bu amaçla, klasik elde iletimli toplayıcı yapıları olarak bilinen Elde Dalgalı Toplayıcı (RCA/ Ripple Carry Adder), Elde Atlamalı Toplayıcı (CSKA/Carry Skip Adder) ve Brent-Kung Paralel Önek Toplayıcı (paralel prefix adder) yapıları Temel Ünite (Basic Unit) ile birlikte kullanılarak karma toplayıcı devreleri oluşturulmuştur. Bu makalede incelenen CSLA/Brent_Kung-TU elde seçmeli karma toplayıcı devrelerinin 16 bit, 32 bit, 64 bit operand uzunlukları için devre tasarımları gerçeklenerek performans analizleri yapılmıştır. Bu çalışmada önerilen yeni Elde Seçmeli Karma Toplayıcı devrelerinin klasik Elde İletimli Toplayıcı ve klasik Elde Seçmeli Toplayıcı devrelerine göre daha etkin tasarımlar oldukları görülmüştür

DESIGN OF EFFICIENT HYBRID CARRY SELECT ADDERS

Hybrid adders that are formed by the combination of different adder circuits are basic and important arithmetic operation units suitable for the Very Large Scale Integration (VLSI) circuit design. Carry Select Adder (CSLA) circuits based on the parallel addition are frequently used in hybrid adder circuit designs due to their regularity and modularity. Therefore, CSLAs have gained great importance for the high-performance VLSI circuit design. This has led researchers to develop the design algorithms for CSLA-based hybrid adder circuits. In this study, highperformance Carry Select (CSLA) Hybrid Adder circuit designs were developed using different Carry Propagate Adder (CPA) circuits with the Basic Unit (BU). For this purpose, hybrid adder units were formed using Ripple Carry Adder (RCA), Carry Skip Adder (CSKA), and Brent-Kung Parallel Prefix Adder (PPA), which are known to be the classical carry propagate adders, with the Basic Unit (BU). In this article, circuit designs were realized for 16-bit, 32-bit, and 64-bit operand lengths of CSLA/RCABU, CSLA/CLA-BU, CSLA/CSKA-BU, and CSLA/Brent_Kung-BU carry select hybrid adder circuits, and their performance analyses were carried out. At the end of this work, it is observed that novel Carry Select Hybrid Adder circuits are more effective designs than classical Carry Propagate Adder or classical Carry Select Adder circuits

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