Statistical Model of Hot-Carrier Degradation and Lifetime Prediction for P-MOS Transistors

Along with advances in microelectronics, and computer and space technologies, device dimensions are becoming smaller; as a result, hot-carrier effect, lifetime prediction, and reliability become more important concepts for MOS transistors. In this paper, the degradation in the drain current and threshold voltage of P-MOS transistors are observed by operating the devices under voltage stress conditions. Using the observation results, the effect of hot-carriers was investigated statistically and a new statistical method for modeling was proposed as an alternative to those given in the literature. The linear regression method is used to estimate the power, Weibull, and logarithmic parameters, and the correlation coefficient is used to confirm the results. The observed and estimated values of the degradation are compared. SPICE simulation of a CMOS inverter was performed to demonstrate how the proposed method can be applied to a circuit example.

Statistical Model of Hot-Carrier Degradation and Lifetime Prediction for P-MOS Transistors

Along with advances in microelectronics, and computer and space technologies, device dimensions are becoming smaller; as a result, hot-carrier effect, lifetime prediction, and reliability become more important concepts for MOS transistors. In this paper, the degradation in the drain current and threshold voltage of P-MOS transistors are observed by operating the devices under voltage stress conditions. Using the observation results, the effect of hot-carriers was investigated statistically and a new statistical method for modeling was proposed as an alternative to those given in the literature. The linear regression method is used to estimate the power, Weibull, and logarithmic parameters, and the correlation coefficient is used to confirm the results. The observed and estimated values of the degradation are compared. SPICE simulation of a CMOS inverter was performed to demonstrate how the proposed method can be applied to a circuit example.

___

  • E. Takeda, C.Y. Yang, “Hot-Carrier Effects in MOS Devices”, Academic Press, 1995.
  • J.J. Liou, A.O. Conde, F.G. Sanchez, “Analysis and Design of MOSFETs, Kluwer Academic Publishers”, 1998. [3] Y. Tsividis, “Operation and Modeling of the MOS Transistor”, McGraw-Hill, 1999.
  • R. Thewes, M. Brox, K.F. Goser, W. Weber, “Hot-Carrier degradation of PMOSFET’s under analog operation”, IEEE Trans. Electron Devices, vol. 44, no. 4, pp. 607-617, 1997.
  • S.L. Jang, T.H. Tang, Y.S. Chen, C.J. Sheu, “Modeling of Hot-Carrier Stressed Characteristic of Submicrometer PMOSFETs”, Solid State Electronics, vol. 39, no.7, pp.1043-1049, 1996.
  • Y. Pan, “A Physical-Based Anaytical Model for the Hot-Carrier Induced Saturation Current Degradation of PMOSFET’s”, IEEE Trans. Electron Devices, Vol. 41, no. 1, pp. 84-89, 1994.
  • M. Brox, E. Wohlrab, W. Weber, “A Physical Lifetime Prediction Method for Hot-Carrier Stressed PMOS Transistors”, IEDM Tech. Dig., pp. 525-528, 1991.
  • C.C. Li, K.N. Quader, E.R. Minami, C. Hu, P.K. Ko, “A New Bi-directional PMOSFET Hot-Carrier Degradation Model for Circuits Reliability Simulation”, IEDM Tech. Dig., pp. 547-550, 1992.
  • M. Brox, A.V. Schwerin, Q. Wang, W. Weber, “A Model for Time and Bias Dependence of PMOSFET Degradation”, IEEE Trans. Electron Devices, Vol. 41, no. 7, pp. 1184-1196, 1994.
  • A.B.M. Elliot, “The Use of Charge Pumping Currents to Measure Surface State Densities in MOS Transistors”, Solid-State Electronics, Vol. 19, pp. 241-247, 1976.
  • P. Heremans, R. Bellens, G. Groeseneken, H.E. Maes, “Consistent Model for the Hot-Carrier Degradation in N-Channel MOSFETs”, IEEE Trans. Electron Devices, Vol. 35, no. 12, pp. 2194-2209, 1998.
  • F. Ka¸car, A. Kuntman, H. Kuntman, “A Simple Approach for Modelling the Influence of Hot-Carrier Effect on Threshold Voltage of MOS Transistors”, Proceedings of the 13th International Conference on Microelectronics (ICM’2001), pp.43-46, Rabat, Morocco.
  • A. Kuntman, A. Ardalı, H. Kuntman, F. Ka¸car, “A Weibull distribution-based new approach to represent hot carrier degradation in threshold voltage of MOS transistors”, Solid-State Electronics Vol. 48, Issue 2, pp.217-223, 2004.
  • W. Wang, D. Ke¸cecio˘glu, “Fitting the Weibull Log-Linear Model to Accelerated Life-Test Data”, IEEE Trans- actions on Reliability Vol. 49 No:2, 2000.
  • H. Singh, S. Shukla, “Estimation in the Two-parameter Distribution with Prior Information”, IAPQR Trans- actions, pp. 107-118, 2000.
  • M. Al-Fawzan , “Methods for Estimating the Parameters of the Distribution”, K. A. City Of Science and Technology, Saudi Arabia, 2000.
  • R. Ross, “Comparing Linear Regression and Maximum Likelihood Methods to Estimate Weibull Distributions on Limited Data Sets: Systematic and Random Errors”, Conference on Electrical Insulation and Dielectric Phenomena, 1999.
  • G. Groeseneken, “Hot carrier degradation and ESD in submicron CMOS technologies: how do they interact?”, IEEE Trans. Device and Materials Reliability, Vol:1, pp. 23-32, 2001.
  • C.T. Wang, “Hot Carrier Design Considerations for MOS Devices and Circuits”, Van Nostrand Reinhold, New York,1992.
  • J.M. RaŞ, F. Campabadal, “Hot carrier reliability in deep-submicrometer LATID NMOSFETs”, Microelectron- ics Reliability, Vol:40, pp. 743-746, 2000.
  • A.J. Mouthaan, C. Salm, M.M. Lunenber, M.A.R.C. De Wolf, F.G. Kuper, “Dealing with hot-carrier aging in nMOS and DMOS, models, simulations and characterizations”, Microelectronics Reliability,Vol:40, pp. 909-917, 2000.
  • M. Tanizawa, M.M. Ikeda, N. Kotani, K. Tsukamoto, K. Horie, “A Complete substrate current model including band-to-band tunneling current for circuit simulation”, IEEE, Trans. On Computer-Aided Design of Integrated Circuits and Systems, Vol:40, pp:1749-1757, 1993.
  • G. D¨uzenli, “Development of MOS models suitable for simulation of analog CMOS circuits after hot-carrier stress”, PhD Thesis, Institute of Science and Technology, ˙Istanbul Technical University, 2002.
  • F. Ka¸car, “New approaches for the modelling of hot carrier effect in MOSFET’s”, PhD Thesis, Institute of Sciences, ˙Istanbul University, 2005.