Jenerik Cordic algoritmasının FPGA’da donanımsal gerçeklenmesi

Trigonometrik, logaritmik, hiperbolik vb. matematiksel fonksiyonlarının donanımsal gerçeklenmesi sıklıkla kullanılmaktadır. Bu fonksiyonların donanımsal gerçeklenmesi yöntemlerden biri olan CORDIC algoritması donanım kaynağı, güç tüketimi açısından ön plana çıkmaktadır. Çalışmada sinyal işleme uygulamalarında kullanmak amacıyla döndürme ve vektörelmodlarda dairesel açı dönüşümleri kullanan Jenerik CORDIC algoritmasının FPGA’degerçeklenmesi anlatılmıştır. Uygulamada farklı iterasyon değerlerinde ve veri uzunluklarında sentez sonuçlarıyla birlikte gerçekleme sonucunda ortalama karesel hata değerleri karşılaştırmalı olarak verilmiştir. Sonuçlarda, sabit çarpan değerinde iterasyon sayısının donanımsal gerçeklemeyi etkilemediği ve sabit iterasyon değerinde çarpan değeri arttıkça çıkışta elde edilen sonuçların hata değerlerinin azaldığı gözlemlenmiştir. Gerçeklemede Xilinx firmasına ait Artix-7 FPGA XC7A100T-1CSG324C FPGA entegresi kullanılmıştır.

Hardware iplementation of generic CORDIC algorithm on FPGA

Trigonometric, exponential, logarithmic, hyperbolic and several other mathematical functions, are frequently used in hardware implementation applications. CORDIC algorithm, which is a widely used method for hardware implementation of these functions due to its efficient space utilization and low power consumption. In this study, FPGA hardware implementation of rotation angle conversion and circular vector mode CORDIC algorithm for signal processing applications is described. The resulting mean squared error values are provided with respect to different data lengths and different iterations. In this study, the target implmentation platform is Xilinx Artix-7 FPGA platform.

PDF

___

S. Karthick, P. Priya ve V. S, “CORDIC Based FFT for Signal Processing System”, International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, cilt 1, no. 6, 2012.
Y. H. Hu ve Z. Wu, “An efficient CORDIC array structure for the implementation of discrete cosine transform”, IEEE Transactions on Signal Processing , cilt 43, no. 1, pp. 331 - 336, 2002.
Y. H. Hu, “On the Convergence of the CORDIC Adaptive Lattice Filtering (CALF) Algorithm”, IEEE TRANSACTIONS ON SIGNAL PROCESSING, cilt 46, no. 7, pp. 1861-1871, 1998.
S. Sharma, P. N. Ravichandran, S. Kulkarni, V. M. ve P. Lakshminarsimahan, “Implementation of Para-CORDIC Algorithm and Its Applications in Satellite Communication”, International Conference on Advances in Recent Technologies in Communication and Computing, 2009 .
P. Revathi, M. N. Rao ve G. Locharla, “Architecture Design and FPGA Implementation of CORDIC Algorithm for Fingerprint Recognition Applications”, Procedia Technology, cilt 6, p. 371–378, 2012.
P.Karthikeyan, K.Kavaskar, P.Kirbakaran, A.Manikandan ve R. Sekar, “VLSI Implementation of Cordic Based Robot Navigation Processor”, International Research Journal of Engineering and Technology, cilt 3, no. 2, 2016.
J. Sujitha ve V. R. Reddy, “Implementation of Log and Exponential Function in FPGA”, International Journal of Engineering Research & Technology, cilt 3, no. 11, 2014.
L. Deng, C. Chakrabarti, N. Pitsianis ve X. Sun, “Automated optimization of look-up table implementation for function evaluation on FPGAs”, Mathematics for Signal and Information Processing, 2009.
B. Lakshmi ve A. S. Dhar, “CORDIC Architectures: A Survey”, VLSI Design, cilt 2010, 2010.
M. A. Çavuşlu, C. Karakuzu ve F. Karakaya, “Neural identification of dynamic systems on FPGA with improved PSO learning”, Applied Soft Computing, cilt 12, no. 9, p. 2707–2718, 2012.
J. Volder, “The CORDIC Trigonometric Computing Technique”, IRE Trans. Electronic Computers, cilt 8, pp. 330-334, 1959.
B. Kir, M. Altuncu ve S. Şahin, “FPGA based implementation of CORDIC using different number format”, Technological Advances in Electrical, Electronics and Computer Engineering, 2013.
J. Sanchez, A. Jimeno, H. Mora, J. Mora ve F. Pujol, “A Cordic-based Architecture for High Performance Decimal Calculations”, IEEE International Symposium on Industrial Electronics, 2007.
R. Andraka, “A survey of CORDIC algorithms for FPGA based computers”, IEEE Transactions on Computers, cilt 45, no. 3, p. 328–339, 1998.
K. Kumar, K. Rao ve R. Durga, “FPGA Implementation of DSWG Using CORDIC Algorithm”, International Journal of Innovative Research in Computer and Communication Engineering, cilt 1, no. 7, 2013.
R. Mehra ve B. Kamboj, “FPGA Implementation of Pipelined CORDIC Sine Cosine Digital Wave Generator”, Int. J. Comp.Tech. Appl, cilt 1, no. 1.
J. S. Walther, “A unified algorithm for elementary functions”,Proceedings of the AFIPS Spring Joint Computer Conference, 1971.
J. S. Walther, “The story of Unified CORDIC”, Journal of VLSI Signal Processing, cilt 25, no. 2, p. 107–112, 2000.