NVRH-LUT: A nonvolatile radiation-hardened hybrid MTJ/CMOS-based look-up table for ultralow power and highly reliable FPGA designs

Complementary metal oxide semiconductor (CMOS) downscaling leads to various challenges, such as highleakage current and increase in radiation sensitivity. To solve such challenges, hybrid MTJ/CMOS technology-baseddesign has been considered as a very promising approach thanks to the high speed, low power, good scalability, and fullcompatibility of magnetic tunnel junction (MTJ) devices with CMOS technology. One important application of MTJsis the efficient utilization in building nonvolatile look-up tables (NV-LUTs) used in reconfigurable logic. However, NVLUTs face severe reliability issues in nanotechnology due to the increasing process variations, reduced supply voltage,and high energetic particle strike at sensitive nodes of CMOS circuits. This paper proposes a nonvolatile radiationhardened look-up table (NVRH-LUT) for advanced reconfigurable logic. Compared with previous works, the proposedNVRH-LUT is fully robust against single-event upsets and also single-event double-node upsets that are among the mainreliability-challenging issues for NV-LUTs. Results have shown that NVRH-LUT not only provides increasing reliabilityand reduced bit error rate but also offers low delay and low energy consumption.

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