Meenu NAIR, Vivek GOPINATH, Jayanta BISWAS, Mukti BARAI

An optimized harmonic elimination method based on synchronized microcontroller architecture

This paper proposes an optimized synchronous PWM method for harmonic elimination in a quasi squarewave inverter. The synchronized PWM method enables online harmonic computation and PWM pulse generationin a multitasking digital controller to eliminate lower order harmonics. The multitasking digital controller reducesthe look-up table requirement and helps in realizing efficient implementation to eliminate dominant harmonics. Thismethod offers a simple scalable solution for combined fifth and seventh harmonic elimination using two low-cost eight-bitPIC microcontrollers (PIC18F4550, PIC18F452). Experimental results are demonstrated for a single-phase three-levelinverter. The proposed method achieves 90% reduction of fifth and seventh harmonic components from a quasi squarewave inverter output.

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