The reduction of semiconductor devices in a ying capacitor-based multilevel converter for use as an SSSC
The reduction of semiconductor devices in a ying capacitor-based multilevel converter for use as an SSSC
This paper proposes the use of a static synchronous series compensator (SSSC) to increase the power capacity of a 230 KV transmission line. The power capacity is increased by 30%. The proposed SSSC is a 21-level inverter based on the cascade connection of improved double ying capacitor multicell (CI-DFCM) converter. The main advantages of the CI-DFCM multilevel inverter are the low number of power-electronic devices, as well as reduction in the number and voltage diversity of ying capacitors in comparison with other ying capacitor-based inverters. The CI-DFCM multilevel inverter uses only two ying capacitors in each phase. The theory of instantaneous p-q power is applied to control the proposed SSSC. By applying the presented control method, the dc-link capacitors are charged to the desired voltage value. The modulation method of the CI-DFCM multilevel inverter is a modi ed phase shifted pulse width modulation (PS-PWM) technique. In order to validate the accurate performance of the proposed compensator, a three-phase transmission line with the transmitted active power of 160 MW is simulated. The simulation results are provided by MATLAB/Simulink.
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