V. V. Satyanarayana SATTI, Sridevi SRIADIBHATLA

Hybrid self-controlled precharge-free CAM design for low power and high performance

Content-addressable memory (CAM) is a prominent hardware for high-speed lookup search, but consumeslarger power. Traditional NOR and NAND match-line (ML) architectures suffer from a short circuit current path sharingand charge sharing respectively during precharge. The recently proposed precharge-free CAM suffers from high searchdelay and the subsequently proposed self-controlled precharge-free CAM suffers from high power consumption. Thispaper presents a hybrid self-controlled precharge-free (HSCPF) CAM architecture, which uses a novel charge controlcircuitry to reduce search delay as well as power consumption. The proposed and existing CAM ML architectureswere developed using CMOS 45nm technology node with a supply voltage of 1 V. Simulation results show that theproposed HSCPF CAM-type ML design reduces power consumption and search delay effectively when compared torecent precharge-free CAM-type ML architectural designs.

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