Design of low power system on programmable chip for video zoom-in processing
Design of low power system on programmable chip for video zoom-in processing
Today, power consumption presents a critical issue when designing embedded systems. It has become a key factor in a product s success when being marketed, especially for mobile systems. In this paper, we have developed a typical design for video zoom-in processing with low power consumption. The proposed design has been implemented on the Xilinx Virtex-5 with the integration of different important resources like embedded processor, embedded memory, MPMC, DDR, and various interfaces. The design results show a significant gain in power at the simulation level as well as the physical one. In addition, the proposed design provides an important gain in power without degrading other parameters such as frequency, area, and others.
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