Design of low power CMOS LC VCO for direct conversion transceiver

Design of low power CMOS LC VCO for direct conversion transceiver

A low power 1.2 GHz LC differential voltage-controlled oscillator (VCO) is designed for a direct conversion transceiver in 130 nm CMOS processes. It consists of a complementary current reuse structure and LC tank circuit. To produce a good tuning range and reduce losses in the tank circuit, modified inversion mode PMOS varactors and an on-chip inductor are designed with a better quality factor. The flicker noise is reduced by the PMOS tail current source connected in parallel with the capacitance. The 1.2 GHz LC VCO achieves a phase noise value of 132 dBc/Hz at 1 MHz offset and the tuning range of the oscillator is from 1.128 to 1.27 GHz for the control voltage, tuning from 0 to 1.5 V. It dissipates 245 µ W power at 0.8 V supply voltage and the figure of merit is calculated as 199.7 dBc/Hz.

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  • [1] Abidi AA. Direct-conversion radio transceivers for digital communications. IEEE J Solid-St Circ 1995; 30: 1399- 1410.
  • [2] Strange J, Atkinson S. A direct conversion transceiver for multi-band GSM application. In: IEEE 2000 Radio Frequency Integrated Circuits Symposium; 10–13 June 2000; Boston, MA, USA. pp. 25-28.
  • [3] De Cock W, Steyaert M. A 2.5 V, 10 GHz fully integrated LC-VCO with integrated high-Q inductor and 30% tuning range. Analog Integr Circ S 2002; 33: 137-144.
  • [4] Hajimiri A, Lee TH. Design issues in CMOS differential LC oscillators. IEEE J Solid-St Circ 1999; 34: 717-724.
  • [5] Ham D, Hajimiri A. Concepts and methods in optimization of integrated LC VCOs. IEEE J Solid-St Circ 2001; 36: 896-909.
  • [6] Bunch R, Raman S. Large-signal analysis of MOS varactors in CMOS -Gm LC VCOs. IEEE J Solid-St Circ 2003; 38:1325-1332.
  • [7] Long J, Foo JY, Weber RJ. A 2.4 GHz low-power low-phase-noise CMOS LC VCO. In: Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI; 19–20 February 2004. pp. 213- 214.
  • [8] Sun P, Wang G, Woods W, Wang H, Yu YJ. An adaptive body-bias low voltage low power LC VCO. In: Proceedings of 2010 IEEE International Symposium on Circuits and Systems; 30 May–2 June 2010; Paris, France. pp. 1121-1124.
  • [9] Fiorelli R, Peral´ıas EJ, Silveira F. LC-VCO design optimization methodology based on the g m /I D ratio for nanometer CMOS technologies. IEEE T Microw Theory 2011; 59: 1822-1831.
  • [10] Zhou HF, Shum KM, Cheung RCC, Xue Q, Chan CH. A low power low phase noise LC voltage-controlled oscillator. Prog Electromagn Res L 2013; 38: 65-73.
  • [11] Yu F A low-voltage and low-power 3-GHz CMOS LC VCO for S-band wireless applications Wireless Pers Commun 2014; 78: 905-914.
  • [12] Zolfaghari A, Chan A, Razavi B. Stacked inductors and transformers in CMOS technology. IEEE J Solid-St Circ 2001; 36: 620-628.
  • [13] Sia CB, Ong B, Chan KW, Yeo KS, Ma JG, Do MA. Physical layout design optimization of integrated spiral inductors for silicon-based RFIC applications. IEEE T Electron Dev 2005; 52: 2559-2567.
  • [14] Koutsoyannopoulos YK, Papananos Y. Systematic analysis and modeling of integrated inductors and transformers in RFIC design. IEEE T Circuits-II 2000; 47: 699-713.
  • [15] Hajimiri A, Lee TH. A general theory of phase noise in electrical oscillators. IEEE J Solid-St Circ 1998; 33: 179-194.
  • [16] Rael JJ, Abidi AA. Physical processes of phase noise in differential LC oscillators. In: Proceedings of the IEEE 2000 Custom Integrated Circuits Conference; 21–24 May 2000; Orlando, FL, USA. pp. 569-572.
  • [17] Hegazi E, Sj¨oland H, Abidi AA. A filtering technique to lower LC oscillator phase noise. IEEE J Solid-St Circ 2001; 36: 1921-1930.
  • [18] De Muer B, Borremans M, Steyaert M, Li Puma G. A 2-GHz low-phase-noise integrated LC-VCO set with flickernoise upconversion minimization. IEEE J Solid-St Circ 2000; 35: 1034-1038.
  • [19] Kenneth KO, Park N, Yang DJ. 1/f noise of NMOS and PMOS transistors and their implications to design of voltage controlled oscillators. In: IEEE 2002 Radio Frequency Integrated Circuits Symposium, 2–4 June 2002; Seattle, WA, USA. pp. 59-62.
  • [20] Bhattacharjee J, Mukherjee D, Gebara E, Nuttinck S, Laskar J. A 5.8 GHz fully integrated low power low phase noise CMOS LC VCO for WLAN applications. In: IEEE 2002 Radio Frequency Integrated Circuits Symposium; 3–4 June 2002; Seattle, WA, USA. pp. 475-478.
  • [21] Hou JA, Wang YH. A 5 GHz differential Colpitts CMOS VCO using the bottom PMOS cross-coupled current source. IEEE Microw Wirel Co 2009; 19: 401-403.
  • [22] De Astis G, Cordeau D, Paillot JM, Dascalescu L. A 5-GHz fully integrated full PMOS low-phase-noise LC VCO. IEEE J Solid-St Circ 2005; 40: 2087-2091.