Fast Calculation of Polar Code Bits and Frozen-Bit Locations

In this paper, we show that encoding operation for the polar codes can be achieved without the employment of the generator matrix, and all the polar code bits can be generated at the same time using a number of tree-encoding structures running in parallel. Since encoding matrix is not used in the implementation of the polar encoders in digital electronic devices, hardware space is saved, and low complexity hardware applications are achieved. Besides, we also proposed a method for the calculation of split channel parameters, such as Bhattacharyya bounds or average-bit-error probabilities of the transmitted bits using a tree-based structure. Moreover, the proposed structure enables to calculate the probability of bit-error values of all the transmitted bits at the same time in a parallel manner and decide the locations of data and frozen bits very rapidly.

Keywords:

Polar codes, encoding algorithm, generator matrix transformation tree structure, FPGA.,

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Cankaya University Journal of Science and Engineering-Cover

Yayın Aralığı: Yılda 2 Sayı
Başlangıç: 2009
Yayıncı: Çankaya Üniversitesi

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