Görünür Işık Haberleşme Sistemleri için SC-PPM Tekniği Kullanılarak Alıcı-Verici Tasarımı

Alt Taşıyıcılı Darbe Konum Modülasyonu (SC-PPM: Subcarrier Pulse Position Modulation) Görünür IşıkHaberleşme (VLC: Visible Light Communication) sistemleri için kullanılan iletim tekniklerinden birisidir. GIHsistemleri için daha önce yapılan çalışmalar incelendiğinde uygulanabilir bir FPGA (Field Programmable GateArrays: Alanda Programlanabilir Kapı Dizileri) tabanlı sistem eksikliği gözlemlenmiştir. Bu nedenle yapılançalışmada SC-4PPM için uygulanabilir bir sayısal mimari önerilmiştir. Önerilen mimari FPGA kartı üzerindegerçek zamanlı olarak uygulanmıştır. Ayrıca bilgi bitlerinin alıcı tarafta algılanabilmesi için geleneksel sistemdemodülasyonlu sinyal, bir bant geçiren filtre ve bir alçak geçiren filtreden geçirilmesinden sonra karar devresineuygulanmaktadır. Bu çalışmada bant geçiren filtre alıcı taraftan kaldırılarak bir türev alıcı benzeri yapı ile bilgibitlerinin tahmini gerçekleştirilmiştir. Hem verici hem de alıcı için önerilen mimariler FPGA kartı üzerindeuygulanarak osiloskop üzerinden gerçek zamanlı sonuçlar incelenmiştir. Osiloskop çıktılarına göre önerilen vericive alıcı mimariler başarılı bir şekilde çalışmaktadır.

Transceiver Design for Visible Light Communication Systems by using SC-PPM Technique

Subcarrier Pulse Position Modulation (SC-PPM) is one of the transmission techniques used in the Visible Light Communication (VLC) systems. It is shown that there is a lack about implementation of SC-PPM on FPGA (Field Programmable Gate Arrays) when the literature related to VLC systems is analyzed. Therefore, a practicable digital architecture is proposed for SC-4PPM in the paper. The proposed architecture is implemented on FPGA board for real time applications. In order to detect data bits at the receiver side, moreover, it is applied on decision stage in the traditional system after modulated signal is passed through a band pass filter and low pass filter. In this study, by removing band pass filter from receiver, data bits are estimated via a structure as a differentiator circuit. The architectures proposed for both transmitter and receiver is implemented on FPGA and the real-time results is observed via oscilloscope. According to oscilloscope measurements, the proposed transmitter and receiver structures successfully operate

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