A 0.6-V 11-uW PVT tolerant DTMOS inverter based OTA

This paper presents the design of a process-voltage-temperature (PVT) variation tolerant inverter-based operational transconductance amplifier (OTA) employing both a dynamic threshold MOS (DTMOS) technique and a constant voltage biasing (CVB) scheme. The proposed inverter-based OTA offers a higher bandwidth due to implemented DTMOS technique, which realizes higher input transconductance value than a conventional inverter-based OTA design. Simulation results show that the proposed OTA achieves superior slow-slow (SS) corner performance under PVT variations than the conventional inverter-based OTA while consuming only 11-uW and providing a figure of merit (FoM) of 7.0-MHz.pF/uA. As a result, DC gain and unity-gain bandwidth (UGBW) of the proposed OTA improve by 27% and 32% at SS corner under the PVT variations, respectively.

Keywords:

DTMOS, Inverter based OTA PVT tolerant,

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