Three-phase multilevel inverter with high value of resolution per switch employing a space vector modulation control scheme

Three-phase multilevel inverter with high value of resolution per switch employing a space vector modulation control scheme

A special cascaded configuration of asymmetric multilevel inverter is presented in this paper. This configuration cancels the redundancy of output voltage steps and maximizes the number of levels in the output voltage. This structure is built by using series connected stages, which minimize the number of semiconductor switches, gate drive arrangements, occupying area, and cost. It is a modular type inverter model and the number of voltage levels can be increased by adding new stages without changing the previous connection. Space vector modulation has been applied as the control strategy. A prototype of the proposed inverter topology has been built in the laboratory. The attached hardware results indicate the accuracy of the proposed model, which include the topology as well as the control technique.

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  • [1] Nabae A, Takahashi I, Akagi H. A new neutral-point-clamped PWM inverter. IEEE T Ind Appl 1981; IA-17: 518-523.
  • [2] Colak I, Kabalci E, Bayindir R. Review of multilevel voltage source inverter topologies and control schemes. Energ Convers Manage 2011; 52: 1114-1128.
  • [3] Lai JS, Peng FZ. Multilevel converters-a new breed of power converters. IEEE T Ind Appl 1996; 32: 509-517.
  • [4] Rodriguez J, Lai JS, Peng FZ. Multilevel inverters: a survey of topologies, controls, and applications. IEEE T Ind Electron 2002; 49: 724-738.
  • [5] Hasan M, Mekhilef S, Ahmed M. Three-phase hybrid multilevel inverter with less power electronic components using space vector modulation. IET Power Electron 2014; 7: 1256-1265.
  • [6] Wen J, Smedley KM. Synthesis of multilevel converters based on single-and/or three-phase converter building blocks. IEEE T Power Electr 2008; 23: 1247-1256.
  • [7] Lezana P, Ortiz G. Extended operation of cascade multi cell converters under fault condition. IEEE T Ind Electron 2009; 56: 2697-2703.
  • [8] Baier CR, Guzman JI, Espinoza JR, P´erez MA, Rodriguez JR. Performance evaluation of a multi-cell topology implemented with single-phase non-regenerative cells under unbalanced supply voltages. IEEE T Ind Electron 2007;54: 2969-2978.
  • [9] Pereda J, Dixon J. High-frequency link: a solution for using only one DC source in asymmetric cascaded multilevel inverters. IEEE T Ind Electron 2011; 58: 3884-3892.
  • [10] Inoue S, Akagi H. A bi-directional isolated DC/DC converter as a core circuit of the next-generation medium-voltage power conversion system. In: IEEE 2006 Power Electronics Specialists Conference; 18–22 June 2006; Jeju, South Korea: IEEE. pp. 1-7.
  • [11] Mariethoz S, Rufer A. Multisource DC-DC converter for the supply of hybrid multilevel converter. In: IEEE 2006 Industry Applications Conference; 8–12 Oct. 2006; Tampa Florida: IEEE. pp. 982-987.
  • [12] Wheeler P, Empringham L, Gerry D. Improved output waveform quality for multi-level H-bridge chain converters using unequal cell voltages. In: IEE 2000 Eighth International Conference on Power Electronics and Variable Speed Drives; 2000; London: IEE. pp. 536-540.
  • [13] Khoucha F, Lagoun SM, Marouani K, Kheloui A, HachemiBenbouzid M El. Hybrid cascaded H-bridge multilevelinverter induction-motor-drive direct torque control for automotive applications. IEEE T Ind Electron 2010; 57:892-899.
  • [14] Khoucha F, Lagoun MS, Kheloui A, HachemiBenbouzid M. El. A comparison of symmetrical and asymmetrical three-phase H-bridge multilevel inverter for DTC induction motor drives. IEEE T Energy Conver 2011; 26: 64-72.
  • [15] Mekhilef S, Kadir MNA. Novel vector control method for three-stage hybrid cascaded multilevel inverter. IEEE T Ind Electron 2011; 58: 1339-1349.
  • [16] Mekhilef S, Abdul Kadir MN, Salam Z. Digital control of three phase three-stage hybrid multilevel inverter. IEEE T Ind Electron 2013; 9: 719-727.
  • [17] Kadir MNA, Mekhilef S, Ping HW. Dual vector control strategy for a three-stage hybrid cascaded multilevel inverter. J Power Electron 2010; 10: 155-164.
  • [18] Mariethoz S, Rufer A. Design and control of asymmetrical multi-level inverters. In: IEEE 2002 Annual Conference of the Industrial Electronics Society; 5–8 Nov 2002; Meli´a Lebreros Hotel, Sevilla, Spain: IEEE. pp. 840-845.
  • [19] Song-Manguelle J, Rufer A. Multilevel inverter for power system applications highlighting asymmetric design effects from a supply network point of view. In: IEEE 2003 Canadian Conference on Electrical and Computer Engineering; 4–7 May 2003, Montreal, Que., Canada: IEEE. pp. 435-440.
  • [20] Rotella M, Pe˜nailillo G, Pereda J, Dixon J. PWM method to eliminate power sources in a non-redundant 27-level inverter for machine drive applications. IEEE T Ind Electron 2009; 56: 194-201.
  • [21] Gonzalez S, Valla M, Christiansen C. Five-level cascade asymmetric multilevel converter. IET Power Electron 2010; 3: 120-128.
  • [22] Babaei E, Kangarlu MF, Mazgar FN. Symmetric and asymmetric multilevel inverter topologies with reduced switching devices. Electr Pow Syst Res 2012; 86: 122-130.
  • [23] Su GJ. Multilevel DC-link inverter. IEEE T Ind Appl 2005; 41: 848-854.
  • [24] Babaei E, Hosseini SH. New cascaded multilevel inverter topology with minimum number of switches. Energ Convers Manage 2009; 50: 2761-2767.
  • [25] Babaei E, Hosseini S, Gharehpetian G, Haque MT, Sabahi M. Reduction of dc voltage sources and switches in asymmetrical multilevel converters using a novel topology. Electr Pow Syst Res 2007; 77: 1073-1085.
  • [26] Tolbert L, Peng FZ, Cunnyngham T, Chiasson JN. Charge balance control schemes for cascade multilevel converter in hybrid electric vehicles. IEEE T Ind Electron 2002; 49: 1058-1064.
  • [27] Mekhilef S, Masaoud A. Xilinx FPGA based multilevel PWM single phase inverter. In: IEEE 2006 IEEE International Conference on Industrial Technology; 15–17 December 2006; Mumbai, India: IEEE. pp. 259-264.
  • [28] Rodriguez J, Bernet S, Steimer PK, Lizama IE. A survey on neutral-point-clamped inverters. IEEE T Ind Electron 2010; 57: 2219-2230.
  • [29] Celanovic N, Boroyevich D. A fast space-vector modulation algorithm for multilevel three-phase converters. IEEE T Ind Appl 2001; 37: 637-641.
  • [30] Prats M, Portillo R, Carrasco J, Franquelo L. New fast space-vector modulation for multilevel converters based on geometrical considerations. In: IEEE 2002 Annual Conference of the Industrial Electronics Society; 5–8 Nov 2002; Meli´a Lebreros Hotel, Sevilla, Spain: IEEE pp. 3134-3139.
  • [31] Hasan M, Ahmed M, Mekhilef S. Analyses and simulation of three-phase MLI with high value of resolution per switch employing SVM control scheme. In: IEEE 2012 International Conference on Power and Energy; 2–5 December 2012; Kota Kinabalu, Malaysia: IEEE pp. 7-12.
  • [32] Najafi E, Yatim AHM. Design and implementation of a new multilevel inverter topology. IEEE T Ind Electron 2012; 59: 4148-4154.
  • [33] Batschauer AL, Mussa SA, Heldwein ML. Three-phase hybrid multilevel inverter based on half-bridge modules. IEEE T Ind Electron 2012; 59: 668-678.