Design of a high performance narrowband low noise amplifier using an on-chip orthogonal series stacked differential fractal inductor for 5G applications

Inductors play a crucial role in the design of radio frequency integrated circuits (RFICs) and they typicallyconsume a considerably large area and have a low-quality factor at high frequencies. The employment of fractal structurein on-chip inductors helps in improving the quality factor and also reduces the overall area besides improving theinductance value. In this paper, an orthogonal series stacked differential fractal inductor is proposed and the same isused to design a low noise amplifier (LNA) for 5G band (27–30 GHz) applications. The proposed inductor is fabricated ona multilayer printed circuit board and the measurement results demonstrate twice the enhancement in inductance, 56%improvement in quality factor, and 33% reduction in series resistance when compared to the conventional series stackedfractal inductor for the equivalent on-chip area. The LNA using cascode topology with inductive source degeneration isdesigned and simulated at a center frequency of 28 GHz in 90 nm CMOS technology using the tool Advanced DesignSystem. The inductors in the LNA are replaced with the proposed on-chip inductor for different layers, which contributesto high gain, better input matching, and low noise figure compared to the state-of-the-art LNAs.

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