Shivram MANSORE, Radheshyam GAMAD

A data-aware write-assist 10T SRAM cell with bit-interleaving capability

A data-aware write-assist 10T SRAM cell with bit-interleaving capability

Turkish Journal of Electrical Engineering and Computer Sciences

2018-Cilt: 26 - Sayı: 5

2361-2373

53 50