Stokastik Hesaplamada Çoklayıcıların Sınırı Üzerine

On the Limit of Multiplexers in Stochastic Computing

Stochastic computing (SC) is an approach used in today's re-emerging hardware environments. Known deterministic circuit elements are fed by binary sequences with probability, and the output sequence probability expresses a mathematical operation in terms of the probability of input sequences. Pulse trains expressed with probability values feed deterministic logic systems by expressing unipolar or bipolar encoding techniques, and an output pulse train with a probability value is obtained. This approach, which provides benefits in terms of complexity, low power, and durability especially for arithmetic operations, appears in applications with flexible fault tolerance such as computer vision. In this context, the multiplexer (MUX) logic system is used as a scaled adder; in other words, the sum of binary probabilistic sequences coming to the inputs of a MUX is seen at the output at the rate of a coefficient. In this study, the limits of the MUX structure within the scope of SC are underlined. With the MUX structures created with different hardware configurations, the architectures are investigated for performance.

Keywords:

bitstream processing, multiplexers, optimization scaled adder, stochastic computing,

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[1] H. Sim and J. Lee, "A new stochastic computing multiplier with application to deep convolutional neural networks," Proc. 54th Annu. Des. Autom. Conf. 2017 - DAC '17, pp. 1–6, 2017, doi: 10.1145/3061639.3062290.
[2] H. Sim and J. Lee, "Cost-effective stochastic MAC circuits for deep neural networks," Neural Networks, vol. 117, pp. 152–162, 2019, doi: 10.1016/j.neunet.2019.04.017.
[3] B. Li, M. H. Najafi, B. Yuan, and D. J. Lilja, "Quantized neural networks with new stochastic multipliers," Proc. - Int. Symp. Qual. Electron. Des. ISQED, pp. 376–382, 2018, doi: 10.1109/ISQED.2018.8357316.
[4] D. J. Lilja, "Low-cost stochastic hybrid multiplier for quantized," J. Emerg. Technol. Comput. Syst. vol. 15(2), 2019. doi: 10.1145/3309882.
[5] A. Ardakani, et al., "VLSI implementation of deep neural network using integral stochastic computing," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 10, pp. 2688-2699, Oct. 2017, doi: 10.1109/TVLSI.2017.2654298.
[6] V. T. Lee, et al., "Energy-efficient hybrid stochastic-binary neural networks for near-sensor computing," 2017 Des. Autom. Test Eur. DATE, pp. 13–18, 2017, doi: 10.23919/DATE.2017.7926951.
[7] S. Aygun, E. O. Gunes, and C. De Vleeschouwer, "Efficient and robust bitstream processing in binarised neural networks," Electron. Lett., vol. 57, no. 5, pp. 219–222, 2021, doi: 10.1049/ell2.12045.
[8] I. Perez-Andrade, et al., "Stochastic computing improves the timing-error tolerance and latency of turbo decoders : Design guidelines and tradeoffs," IEEE Access, vol. 4, pp. 1008-1038, 2016, doi: 10.1109/ACCESS.2016.2523063.
[9] R. P. Duarte, H. Neto, and M. Véstias, "XtokaxtikoX: A stochastic computing-based autonomous cyber-physical system," IEEE Int. Conf. on Rebooting Comp., ICRC 2016, doi: 10.1109/ICRC.2016.7738716.
[10] D. Zhang and H. Li, "A stochastic-based FPGA controller for an induction motor drive with integrated neural network algorithms," IEEE Trans. Ind. Electron., vol. 55, no. 2, pp. 551–561, 2008, doi: 10.1109/TIE.2007.911946.
[11] B. R. Gaines, "Stochastic computing systems," in Advances in Information Systems Science: Volume 2, J. T. Tou, Ed. Boston, MA: Springer US, 1969, pp. 37–172.
[12] W. J. Gross and V. C. Gaudet, Stochastic Computing: Techniques and Applications. Springer, Cham, 2019, doi: 10.1007/978-3-030-03730-7.
[13] A. Alaghi, Cheng Li, and J. P. Hayes, "Stochastic circuits for real-time image-processing applications," 50th Des. Autom. Conf. - DAC '13, pp. 1–6, 2013, doi: 10.1145/2463209.2488901.
[14] P. Li and D. J. Lilja, "Using stochastic computing to implement digital image processing algorithms," IEEE Int. Conf. Comput. Des., pp. 154–161, 2011, doi: 10.1109/ICCD.2011.6081391.
[15] A. Alaghi, "The Logic of Random Pulses : Stochastic Computing," 2015, Ph.D. Dissertation. University of Michigan, Ann Arbor, USA.
[16] J. A. Dickson, R. D. Mcleod, and H. C. Card, " Stochastic arithmetic implementations of neural networks with in situ learning," IEEE Int. Conf. on Neural Networks, doi: 10.1109/ICNN.1993.298642.
[17] K. Kim, et al., "Dynamic energy-accuracy trade-off using stochastic computing in deep neural networks," 2016 53nd ACM/EDAC/IEEE Des. Autom. Conf., pp. 1–6, 2016, doi: 10.1145/2897937.2898011.
[18] A. Alaghi and J. P. Hayes, "On the functions realized by stochastic computing circuits," Great Lakes Symposium on VLSI, pp. 331–336, 2015, doi: 10.1145/2742060.2743758.
[19] B. Li, M. H. Najafi, and D. J. Lilja, "Using stochastic computing to reduce the hardware requirements for a restricted Boltzmann machine classifier," 2016 ACM/SIGDA Int. Symp. Field-Programmable Gate Arrays - FPGA '16, pp. 36–41, 2016, doi: 10.1145/2847263.2847340.
[20] Z. Li, et al., "Towards budget-driven hardware optimization for deep convolutional neural networks using stochastic computing," IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2018.
[21] T. Hirtzlin, et al., "Stochastic computing for hardware ımplementation of binarized neural networks," IEEE Access, vol. 7, pp. 76394–76403, 2019, doi: 10.1109/ACCESS.2019.2921104.
[22] S. Aygun and E. O. Gunes, "On the simulation of software-driven stochastic computing for emerging applications," SCONA Workshop, Des. Autom. Test Eur. DATE, 2020.