Temperature-Aware X-filling for Very Large Scale Integrated Circuits

Temperature-Aware X-filling for Very Large Scale Integrated Circuits

The excess switching activity during testing increases the power dissipation beyond the normaloperation of the circuit. The non-linear power distribution creates localized heating called hotspotwhich results in the structural damage and increased cooling package cost. The temperature of aparticular block depends on heat generation and dissipation of the circuit blocks. The uniformityin power distribution among the circuit blocks is the key requirement for temperature reduction.The unspecified bits present in the test patterns are utilized to reduce the switching activity duringtesting. In this paper, we present an event-driven based power analysis and temperature aware Xfillingto reduce the total power dissipation among the circuit blocks in such a way to reduce peaktemperature. To reduce the peak temperature, the power dissipation of each block is monitoredwith the help of fillings the X-bits. The experiments are carried out with the ISCAS’89 benchmarkcircuit and show a significant reduction in peak temperature and ensure uniform powerdistribution during testing.

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