Desinging Analog Mixed Signal Circuits Using Graphene Nano Ribbon Field Effect Transistors

Graphene is a 2D material formed by planar honeycomb placement of Carbon atoms. Besides its many superior physical properties it has superior electronic properties foremost of which is the high mobility it possesses. Due to this high mobility many Graphene based transistors have been designed. Graphene nano ribbons exhibit a band gap property, which is crucial for implementing transistors as switches. Moreover there exist models for these Graphene Nano Ribbon devices. In this work we first propose a gate array based manufacturing approach. Next assuming devices manufactured in this gate array methodology. We realize and simulate analog mixed signal blocks using Graphene Nano Ribbon transistors. The particular blocks that we used included telescopic amplifiers and StrongARM latches. Next we compared these blocks’ performances against the same blocks implemented in 14nm high performance Silicon CMOS transistors. As a result we observed that the graphene transistors could attain comparable performances to circuits designed in 14nm CMOS. Specifically Graphene blocks can reach up to 80% of the bandwidth of Silicon devices. However Graphene devices have greater power consumption as a result of higher leakage current.

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[1] Y. Zhang, Y. Tan, H. Stormer, and P. Kim, "Fabrication of Graphene pnp junctions with contactless top gates," ed: Nature_London, 2005.
[2] K. S. Novoselov, Z. Jiang, Y. Zhang, S. Morozov, H. L. Stormer, U. Zeitler, et al., "Room-temperature quantum Hall effect in graphene," Science, vol. 315, pp. 1379-1379, 2007.
[3] S. Pisana, P. M. Braganca, E. E. Marinero, and B. A. Gurney, "Graphene Magnetic Field Sensors," IEEE Transactions on Magnetics, vol. 46, pp. 1910-1913, 2010.
[4] E. W. Hill, A. Vijayaragahvan, and K. Novoselov, "Graphene Sensors," IEEE Sensors Journal, vol. 11, pp. 3161-3170, 2011.
[5] T. C. Karalar, "Grafen Nano Şeritlerden Oluşan Transistörleri Kullanarak Analog Devre Tasarımı"," presented at the ELECO 2018 Elektrik Elektronik ve Biyomedikal Mühendisliği Konferansı,
Bursa,Turkey, 2018.
[6] H. V. R. Aradhya, H. R. Madan, M. S. Suraj, M. T. Mahadikar, R. Muniraj, M. Moiz, et al., "Design, analysis and performance comparison of GNRFET based 8-bit ALUs," in 2016 International Conference on Research Advances in Integrated Navigation Systems (RAINS), 2016, pp. 1-6.
[7] M. U. Mohammed and M. H. Chowdhury, "Design of Energy Efficient SRAM Cell Based on Double Gate Schottky-Barrier-Type GNRFET with Minimum Dimer Lines," in 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019, pp. 1-4.
[8] H. Madan, M. J. Hollander, J. A. Robinson, and S. Datta, "Analysis and benchmarking of graphene based RF low noise amplifiers," in 71st Device Research Conference, 2013, pp. 41-42.
[9] Y.-Y. Chen, A. Rogachev, A. Sangai, G. Iannaccone, G. Fiori, and D. Chen, "A SPICE-compatible model of graphene nano-ribbon field-effect transistors enabling circuit-level delay and power analysis under process variation," in Proceedings of the Conference on Design, Automation and Test in Europe, 2013, pp. 1789-1794.
[10] M. Gholipour, Y.-Y. Chen, A. Sangai, and D. Chen, "Highly accurate SPICE-compatible modeling for single-and double-gate GNRFETs with studies on technology scaling," in Proceedings of the conference on Design, Automation & Test in Europe, 2014, p. 120.
[11] S. Sinha, G. Yeric, V. Chandra, B. Cline, and Y. Cao, "Exploring sub-20nm FinFET design with predictive technology models," in Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE, 2012, pp. 283-288.
[12] M. G. Ying-Yu Chen, Artem Rogachev, Amit Sangai, Deming Chen. (2014). SPICE Model of Graphene Nanoribbon FETs. Available: https://nanohub.org/resources/17074
[13] M. Ashida, R. Hoshikawa, and J. Ishii, "CMOS Gate Arrays - Status, trends, design aids," in ESSCIRC '82: Eighth European Solid-State Circuits Conference, 1982, pp. 182-187.
[14] Y. Cao. (2012, 09/04/2018). Predictive Technology Models. Available: ptm.asu.edu
[15] B. Razavi, Design of analog CMOS integrated circuits. Boston, MA: McGraw-Hill, 2001.
[16] B. Razavi, "The StrongARM Latch [A Circuit for All Seasons]," IEEE Solid-State Circuits Magazine, vol. 7, pp. 12-17, 2015.