A novel circuit sizing technique with improved accuracy and efficiency is proposed to resolve the sizing issues in the analog circuit design. The grey wolf optimization (GWO) algorithm has the total number of iterations divided equally for exploration and exploitation, overlooking the impact of balance between these two phases, aimed for the convergence at a globally optimal solution. An enhanced version of a typical GWO algorithm termed as enhanced grey wolf optimization (EGWO) algorithm is presented with improved exploration ability and is successfully applied in analog circuit design. A set of 23 classical benchmark functions is evaluated and the outcomes are compared with recent state of the art. A conventional two-stage CMOS operational amplifier circuit realized in UMC 180nm CMOS technology is used as a benchmark to validate the efficiency and accuracy of the proposed optimization technique. A statistical study is also conducted over the final solution to investigate the exploration ability of the algorithm proving it to be one of the robust and reliable techniques.