This paper presents a new technique that adjusts the hysteresis window depending on the variations in load current caused by a voltage-mode circuit to reduce the voltage and current ripples. Moreover, a compact current-sensing circuit is used to provide an accurate sensing signal for achieving fast hysteresis window adjustment. In addition, a zero-current detection circuit is also proposed to eliminate the reverse current at light loads. As a result, this technique reduces the voltage ripple below 8.08 mV$_{\rm pp}$ and the current ripple below 93.98 mA$_{\rm pp}$ for a load current of 500 mA. Circuit simulation is performed using 0.18 ${\mu}$m CMOS process parameters