COMPARATIVE STUDY OF 0.18ΜM LINEARIZED CMOS LOW NOISE AMPLIFIER

This paper presents a comparative study of linearization techniques for Complementary Metal Oxide Semiconductor low noise amplifier. The study is performed previously reported three different techniques; modified derivative superposition, post distortion and noise/distortion cancellation. To perform the design, cascade amplifier topology and 0.18μm Complementary Metal Oxide Semiconductor process parameters is used. These performance are studied in the frequency range of 1 GHz to 5 GHz through simulation. Simulations are performed in Applied Wave Research design environments program.The results are compared with each other and previously reported publication in ways of Input third order intercept point, Input second order intercept point, gain, input return loss, noise figure and DC power.

Keywords:

Complementary Metal Oxide Semiconductor Low noise amplifier, linearization techniques,

PDF

___

Sorin, V., 2013. High-Frequency Integrated Circuits, Published in the United States of America by Cambridge University Press, New York.
Anandini, C., Kumar, R., & Talukdar, F. A., A Comparative Study of Linearization Techniques of CMOS LNA, International Journal of Recent Development in Engineering and Technology,3 (2014), 2, pp. 2347-6435
Zavarei, M. J., Kargaran, E., & Nabovati, H., Design of high gain CMOS LNA with improved linearity using modified derivative superposition, Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference, (2011),pp. 322-325
Zhang, H., & Sánchez-Sinencio, E., Linearization techniques for CMOS low noise amplifiers: A tutorial, IEEE Transactions on Circuits and Systems I: Regular Papers, (2011), 58(1), pp.22-36.
V. Aparin and L. E. Larson, Modified derivative superposition method for linearizing FET low-noise amplifiers, IEEE Trans. Microw. Theory Tech., vol. 53, (2005), 2, pp. 571–581.
Jussila J. and Sivonen P., A 1.2-V highly linear balanced noise-cancelling LNA in 0.13-µm CMOS, IEEE J. Solid-State Circuits, vol. 43, (2008), 3, pp. 579–587.
S. C. Blaakmeer, E. A. M. Klumperink, D. M. W. Leenaerts, and B. Nauta, Wideband balun-LNA with simultaneous output balancing, noise-canceling and distortion-canceling, IEEE J. Solid-State Circuits, vol. 43, (2008) , 6, pp. 1341–1350.
Loong, T. T., Hashim, A., Mustaffa, M. T., & Noh, N. M., 1.575 GHz to 2.48 GHz multi-standard low noise amplifier using 0.18-µm CMOS with on-chip matching. In Industrial Electronics and Applications (ISIEA), 2011 IEEE Symposium on, (2011), pp. 100-103.
Dehqan, A. R., Kargaran, E., & Mafinezhad, K., Design of low-voltage low-power Dual-Band LNA with using DS method to improve linearity, In Electrical Engineering (ICEE), 2012 20th Iranian Conference, IEEE, (2012), pp. 88-91.
Dai, R., Zheng, Y., He, J., Kong, W., & Zou, S., A 2.5-GHz 8.9-dBm IIP3 current-reused LNA in 0.18-μm CMOS technology, In Radio-Frequency Integration Technology (RFIT), IEEE, (2014), pp. 1-3.
Varga, G., Heising, C. P., Ashok, A., Subbiah, I., Schrey, M., & Heinen, S., A highly linear broadband LNA for TV white spaces and cognitive radio applications, In Microwave Conference (GeMiC),IEEE, (2015), pp. 296-298.
Eslamifar, O., & Shirazi, R. S.,Design an ultra wide band low noise amplifier for use in WLAN applications, In Electrical Engineering (ICEE), IEEE, (2014), pp. 111-115.
Kukde, A. A., Kumaravel, S., & Venkataramani, B., A high linearity folded cascode Low Noise Amplifier for wireless receivers, In Circuit, Power and Computing Technologies (ICCPCT), IEEE, (2014), pp. 1344-1348.
Thacker, M. B., Awakhare, M., Khobragade, R. H., & Dwaramwar, P. A., Multi-standard highly linear CMOS LNA. In Electronic Systems, Signal Processing and Computing Technologies (ICESC),IEEE, (2014), pp. 63-68.
Gao, W., Chen, Z., Liu, Z., Cui, W., & Gui, X., A highly linear low noise amplifier with wide range derivative superposition method, IEEE Microwave and Wireless Components Letters, (2015), 25(12), pp. 817-819.
Kim, N., Aparin, V., Barnett, K., & Persico, C., A cellular-band CDMA 0.25-/spl mu/m CMOS LNA linearized using active post-distortion, IEEE journal of solid-state circuits, (2006), 41(7), pp.1530-1534.
Kim, T. S., & Kim, B. S., Post-linearization of cascode CMOS low noise amplifier using folded PMOS IMD sinker. IEEE microwave and wireless components letters, (2006), 16(4), pp.182-184.
Kim, T. S., & Kim, B. S., Linearization of differential CMOS low noise amplifier using cross-coupled post distortion canceller. In Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE (pp. 83-86). IEEE.
Zhang, H., Fan, X., & Sinencio, E. S., A low-power, linearized, ultra-wideband LNA design technique. IEEE Journal of solid-state circuits, (2009), 44(2), pp. 320-330.
Bruccoleri, F., Klumperink, E. A., & Nauta, B., Wide-band CMOS low-noise amplifier exploiting thermal noise canceling, IEEE Journal of Solid-State Circuits, (2004), 39(2), pp. 275-282.
Jussila, J., & Sivonen, P., A 1.2-V Highly Linear Balanced Noise-Cancelling LNA in 0.13-$\mu {\hbox {m}} $ CMOS. IEEE Journal of Solid-State Circuits, (2008). 43(3), pp. 579-587.
Chen, W. H., Liu, G., Zdravko, B., & Niknejad, A. M., A highly linear broadband CMOS LNA employing noise and distortion cancellation. IEEE Journal of Solid-State Circuits, (2008), 43(5), pp. 1164-1176.
Blaakmeer, S. C., Klumperink, E. A., Leenaerts, D. M., & Nauta, B., Wideband balun-LNA with simultaneous output balancing, noise-canceling and distortion-canceling. IEEE Journal of Solid-State Circuits, (2008), 43(6), pp. 1341-1350.

ISSN: 2536-5010
Yayın Aralığı: Yılda 2 Sayı
Yayıncı: INESEG Yayıncılık A.Ş.

Arşiv